This invention relates to transmission of a sequence of data as a transmission signal according to OFDM (orthogonal frequency division multiplex) modulation and reception of the transmission signal as a reproduction of the sequence according to OFDM demodulation and, more particularly, to AFC (automatic frequency control) of a clock sequence for use in the reception and to arrangement of a synchronizing symbol on transmitting the transmission signal. As a consequence, this invention relates to a method of both transmission and reception, to a transmitter device, and to a receiver device.
OFDM digital communication has recently become an object of great concern in digital sound broadcast for mobiles and in digital television broadcast for terrestrial stations. This is because the OFDM digital propagation is hardly adversely affected by multipath fading and ghost.
In the manner which will later be described in greater detail, an OFDM communication system comprises a transmitter device and a receiver device. The transmitter device transmits a transmission signal in response to a sequence of data supplied thereto. The receiver device receives the transmission signal as a received signal and produces a reproduction of the data sequence.
A little more in detail, the transmitter comprises a serial to parallel converter for converting a sequence of data to parallel data. An inverse discrete Fourier transform circuit converts the parallel data to data symbols by OFDM modulation. A composing unit composes the data symbols into successive frames by adding synchronizing symbols to the frames. A digital-to-analog converter converts the successive frames to a baseband transmission signal. Responsive to the baseband transmission signal, a transmitter frequency converter produces either an intermediate or a radio frequency transmission signal. For use in the serial-to-analog converter, a transmitter clock generator generates a transmitter clock sequence of a transmitter clock frequency. For use in the composing unit, the clock generator frequency divides the clock sequence into a transmitter symbol clock sequence and a transmitter frame clock sequence. For use in the inverse Fourier transform circuit, the clock generator further produces a transmitter data clock sequence.
The receiver comprises a receiver frequency converter for receiving the transmission signal as a baseband received signal. An analog-to-digital converter samples reception samples from the received signal to produce a reception sample sequence. A detecting unit detects the synchronizing symbols as synchronization patterns in the reception sample sequence. It will be presumed that the synchronizing symbols are distinct in the reception sample sequence and are correctly detected as the synchronization patterns, respectively. Responsive to the synchronization patterns, a receiver clock generator controllably generates a receiver sampling frequency of a receiver or controllable clock frequency for use in the analog-to-digital converter and a receiver frame clock sequence, a receiver symbol sequence, and a receiver data clock sequence. Responsive to the three latter clock sequences, a reproducing unit subjects the reception sample sequence to OFDM demodulation to produce a reproduction of the data sequence.
In order to correctly receive at the receiver device the transmission signal as the data sequence reproduction, it is indispensable to precisely control the receiver sampling frequency and the receiver frame, symbol, and data frequencies. In the reception sample sequence, frames and symbols may have time positions subjected to fluctuations. In this event, the receiver frequencies must be made to follow the fluctuations. Automatic frequency control of the receiver clock generator is consequently very important.
In Japanese PCT Prepublication (A) No. 504,037 1993, the receiver clock generator is subjected to automatic frequency control by detecting a frequency shift in a receiver sampling clock sequence in response to a phase shift between two pilot carrier signals and by using the frequency shift in controlling the receiver sampling frequency. This Prepublication corresponds to PCT Publication No. WO92/10,043. In Japanese PCT Prepublication (A) No. 501,357 of 1994, the receiver clock generator is automatically frequency controlled by detecting a frequency shift in a receiver sampling clock sequence in response to a phase rotation of received data symbols and by using the frequency shift in controlling the receiver sampling frequency. This latter Prepublication corresponds to PCT Publication No. WO92/05,646.
In the automatic frequency control disclosed in the former publication, it is necessary to use the two pilot carrier signals exclusively in controlling the receiver clock generator. It is therefore unavoidable to superfluously use a processor for dealing with the two pilot carrier signals. In the automatic frequency control revealed in the latter publication, control by the phase rotation alone is insufficient to control the receiver sampling frequency.